Semiconductor packages have been continuously required to be thinned and lightened in terms of a shape, and have been required to be implemented in a system in package (SiP) form requiring complexation and multifunctionality in terms of a function. In accordance with such a development trend, a fan-out wafer level package (FOWLP) has been recently prominent, and attempts to satisfy requirements of semiconductor packaging by applying several techniques to the FOWLP have been conducted.
In particular, with the commercialization of 5G and IoT (Internet of Things) technologies, the throughput of data increases and communications between semiconductors or devices in the high frequency region is required. To this end, it is required to implement a circuit having a finer pitch than that of a conventional circuit in all devices such as a semiconductor, a semiconductor package, and a main board.